Path: utzoo!attcan!uunet!mcsun!ukc!tcdcs!dce.ie!jp
From: jp@dce.ie (John Pelan)
Newsgroups: comp.ai.neural-nets
Subject: Probabilistic logic nodes
Keywords: WISARD, RAM based hardware, Sensor Arrays
Message-ID: <1990Oct25.234057.7494@dce.ie>
Date: 25 Oct 90 23:40:57 GMT
Organization: Datacode Communications Ltd, Dublin, Ireland
Lines: 14

I am currently engaged in a final year project investigating the use
of (pattern recognition) NN's for processing data from sensor arrays.
The hardware will be based on Random Access Memory chips forming
so called probabilistic logic nodes (extension of WISARD / CONNEX).
If anyone has any hints or ideas regarding this I would welcome any
E-Mail to; 87070057@vax1.dcu.ie. (Note not from where this was sent!)

Thanks.

-- 
John Pelan  (jp@dce.ie)
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