Path: utzoo!utgpu!watserv1!watmath!att!att!emory!swrinde!zaphod.mps.ohio-state.edu!wuarchive!uunet!comp.vuw.ac.nz!gp.govt.nz!zl2tnm!don From: don@zl2tnm.gp.govt.nz (Don Stokes) Newsgroups: comp.arch Subject: Re: Compilers taking advantage of architectural enhancements Message-ID: Date: 23 Oct 90 18:00:29 GMT References: <2781@crdos1.crd.ge.COM> Organization: Me? Organised? Lines: 20 davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) writes: > Honeywell offered the extended instruction set (EIS box) for the > 6000/DPS line, and much of the new instruction set was intended to allow > fast implementation of COBOL, such as direct hardware BCD arithmetic, > string copy and compare, etc. > > Because the address space was limited and instruction processing was > costly, this hyper-CISC was a good decision at the time. It allowed > (from memory) up to 3x speedup of COBOL programs, with about 5-10% cost > increment. DEC offered the Commercial Instruction Set for several of the later PDP-11 (eg the 11/44 etc) models for much the same reasons. Don Stokes, ZL2TNM / / Home: don@zl2tnm.gp.govt.nz Systems Programmer /GP/ Government Printing Office Work: don@gp.govt.nz __________________/ /__Wellington, New Zealand_____or:_PSI%(5301)47000028::DON