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From: worley@compass.com (Dale Worley)
Newsgroups: comp.compilers
Subject: Compilers taking advantage of architectural enhancements
Keywords: code, design
Message-ID: <9010231904.AA04587@sn1987a.compass.com>
Date: 23 Oct 90 19:04:47 GMT
Sender: compilers-sender@esegue.segue.boston.ma.us
Reply-To: worley@compass.com (Dale Worley)
Organization: Compilers Central
Lines: 21
Approved: compilers@esegue.segue.boston.ma.us


   Ah, a potentially interesting and useful topic.  Perhaps we can start
   a discussion that will lead to a list of possible hardware
   architectural enhancements that a compiler can/cannot take advantage
   of?

Part of the trouble with this idea is that "what hardware can be taken
advantage of" changes over time.  For instance, I believe that the Cray-1 was
out for a number of years before people had developed good vectorizing
compilers -- since vector hardware hadn't existed, there was no incentive to
figure out how to build a compiler that took advantage of it!  This leads to
a chicken-and-egg problem -- the compiler doesn't exist because no hardware
needs it, and vice-versa.  The correct solution was mentioned by somebody --
develop both in parallel and tune the combination of the two for best price &
performance.  Of course, it means you have to fund both a hardware effort and
a software effort!

Dale Worley		Compass, Inc.			worley@compass.com
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