Xref: utzoo comp.sys.ibm.pc.hardware:2396 comp.sys.ibm.pc.misc:2852 comp.os.msdos.programmer:1579
Path: utzoo!attcan!uunet!ogicse!emory!hubcap!omni!lsalomo
From: lsalomo@omni.uucp (Lawrence W Salomon)
Newsgroups: comp.sys.ibm.pc.hardware,comp.sys.ibm.pc.misc,comp.os.msdos.programmer
Subject: Re: DMA channel asignments
Keywords: DMA
Message-ID: <11055@hubcap.clemson.edu>
Date: 20 Oct 90 17:36:07 GMT
References: <200@kumr.UUCP>
Sender: news@hubcap.clemson.edu
Reply-To: lsalomo@omni.UUCP (Lawrence W Salomon)
Organization: Clemson University Engineering Department
Lines: 17

If I recall, there are three DMA channels on the chip (and if you have an AT,
then I think you can two chips).  Channel 2, I believe, is used for memory
refresh, since the PC uses dynamic RAM;  channel 3, I believe, is used for
the disk controller;  that leaves channel 1.

Of course, it has been a LONG time since I have messed with the DMA controller,
and I don't have my handy references with me...

Cheers,
Q - the "Q"uestor for knowledge (, a degree, etc.)

lsalomo@hubcap.clemson.edu
ibmman@prism.clemson.edu
ibmman@clemson.clemson.edu
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