Path: utzoo!attcan!uunet!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!ub!dsinc!bagate!cbmvax!daveh From: daveh@cbmvax.commodore.com (Dave Haynie) Newsgroups: comp.sys.amiga Subject: Re: board<>3000 RETRACTION-NEAT NEWSGROUP Message-ID: <15325@cbmvax.commodore.com> Date: 22 Oct 90 21:10:27 GMT References: <10213.AA10213@caleb> Reply-To: daveh@cbmvax.commodore.com (Dave Haynie) Organization: Commodore, West Chester, PA Lines: 55 In article <10213.AA10213@caleb> jdp@caleb.UUCP (Jim Pritchett) writes: >From the net traffic on the subject over the years, it seems that some >A1000s would perform well with 2 or even 3 well designed SOTS cards. >However, most would fail to work properly under the same conditions >with the same cards. A very few A1000s were reported to fail with only >ONE SOTS! This is why CBM went to the single SOTS rule. However, the >first time that I heard anyone claim that this was official policy was >about 1.5 to 2 years later! Early Amiga specifications did discuss the logic for supporting multiple SOTS boxes, but it never gave enough information to do this properly. They gave some simple guidelines for making two boxes work together, but even these were flawed. The original documentation also had 4 Meg PICs as the largest version; anyone interested can read about this original stuff in the early "A2000 Hardware Manual", which was part of the 1.0/1.1 "Phone Book" series. They also talked about 86 pin PICs. All of this was work in progress done during the A1000 development, indicated as such ("subject to change without notice", though in practice, notice was given via Tech Support, DevCons, etc.), and was corrected very shortly after the A1000 shipped. The reason chained SOTS boxes aren't supported is that it is IMPOSSIBLE to correctly build multiple SOTS boxes. The requirements for SOTS boxes logically make this so. The first rule for a SOTS box is that it must buffer the A1000 bus as closely to the edge connector as possible. This has the unfortunate effect of adding two TTL delays, one in, one out, to each additional SOTS box. If you follow the published timing specifications, which are for the Zorro II bus, the second box in such a setup won't be able to meet the specified times for SLAVE*, BERR*, OWN*, XRDY, and a number of other signals. Double buffers on the clocks will dangerously skew these clocks with respect to the motherboard clocks. Published data setup times won't be met by the second box. The list goes on and on. The traditional developer solution to this was to pass the signals through unbuffered. This is the main reason there's alot of flakiness between different SOTS boxes in different orderings, etc. Had the SOTS box design worked like this: A1000 <-> Buffer <-> SOTS <-> SOTS <-> SOTS <-> Termination Box Box It would have been reasonable to support a chained SOTS protocol, and at least would have had a chance to work. Unfortunately, that was not the way they did things. And I was busy with the C128 at the time :-). So the chained SOTS box concept is and forever will be flawed. That doesn't mean it can't work in any specific situation, but it doesn't mean that it can't be guaranteed in any arbitrary hookup by following all Amiga bus timing specifications. Because it is NOT supported. > Jim Pritchett -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Standing on the shoulders of giants leaves me cold -REM