Path: utzoo!attcan!uunet!know!zaphod.mps.ohio-state.edu!usc!ucsd!ucbvax!MULTI.EE.USU.EDU!stiles
From: stiles@MULTI.EE.USU.EDU (G. S. Stiles)
Newsgroups: comp.sys.transputer
Subject: TI's Transputer.
Message-ID: <9010241507.AA06153@multi.ee.usu.edu>
Date: 24 Oct 90 15:07:16 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Organization: The Internet
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>From Electronics, October 1990, p. 28:
TI has announced the TMS320C40 parallel DSP.  A descendant of the 320Cxx
series, the processor has a "six channel DMA module and a six port
communications module".  TI claims 50 MFLOPS and 320 MBytes/s throughput
between chips.  Each comm port runs at 20 MBytes/s.
(I know the numbers don't seem to add up, but ....)  I/O is apparently
concurrent.  Samples available 1st Q 91 - just in time to run it against
the H1.