Newsgroups: sci.electronics
Path: utzoo!utgpu!cunews!bnrgate!bwdlh131!mleech
From: mleech@bwdlh131.bnr.ca (Marcus Leech)
Subject: Re: DPLL design needed
Message-ID: <1990Oct23.155747.16898@bnrgate.bnr.ca>
Keywords: DPLL phase-locked loops NRZI
Sender: news@bnrgate.bnr.ca (USENET News System)
Reply-To: mleech@bwdlh131.bnr.ca (Marcus Leech)
Organization: Bell-Northern Research, Ottawa, ON, CANADA
References: <1990Oct18.203839.20608@bnrgate.bnr.ca> <18518@oolong.la.locus.com>
Date: Tue, 23 Oct 90 15:57:47 GMT

In article <18518@oolong.la.locus.com>, dana@lando.la.locus.com (Dana H.
Myers) writes:
||>
|>  Well, if you MUST use the PAL16R8, then the Tucson Amateur Packet
|>Radio 'State Machine DCD' won't help you. Otherwise, the TAPR State
|>Machine DCD is a nice little PC board with a 27C64 OTPROM burned with
|>a state machine program that generates a 'coherent' DCD output.
|>The kit, all parts included, runs about $17 from TAPR. A self clocking
|>option is available for a few dollars more.
I'm well aware of the TAPR DCD state machine.  For space/power reasons,
I'd like
  to basically reimplement that in a PAL.  I'm probably going to be producing
  more than one of these (potentially hundreds), which is why I'm interested in
  a PAL design. This is basically for an add-on modem board for our PI board.
  (See the recent announcement in rec.ham-radio).

                       
-----------------
Marcus Leech, 4Y11             Bell-Northern Research  |opinions expressed
mleech@bnr.ca                  P.O. Box 3511, Stn. C   |are my own, and not
VE3MDL@VE3JF.ON.CAN.NA         Ottawa, ON, CANADA      |necessarily BNRs