Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!uwm.edu!bionet!agate!linus!linus!bs From: bs@linus.mitre.org (Robert D. Silverman) Newsgroups: comp.arch Subject: Re: SUN Cache Keywords: SUN Cache 68020 Message-ID: <124726@linus.mitre.org> Date: 29 Oct 90 13:06:17 GMT References: <1990Oct27.230837.1580@sbcs.sunysb.edu> Reply-To: bs@faron.UUCP (Robert D. Silverman) Distribution: usa Organization: The MITRE Corporation, Bedford MA Lines: 16 In article <1990Oct27.230837.1580@sbcs.sunysb.edu> mhenz@sbcs.sunysb.edu (Martin Henz) writes: :I am sitting in front of a SUN 3/50M-4 and would like :to know some details about it's cache memory. :I know that it's 68020 has 256 byte i-cache on chip. :I don't know what's off chip. : :Do you know? Thank you, The SUN 3/50, 3/75, and 3/60 are all cacheless architectures. There is no data cache. -- Bob Silverman #include Mitre Corporation, Bedford, MA 01730 "You can lead a horse's ass to knowledge, but you can't make him think"