Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!uunet!mcsun!ukc!dcl-cs!aber-cs!athene!pcg From: pcg@cs.aber.ac.uk (Piercarlo Grandi) Newsgroups: comp.arch Subject: Re: Tektronix shutdown & move away from 88k's?? Message-ID: Date: 31 Oct 90 15:07:22 GMT References: <1536@ftc.framentec.fr> <1990Oct19.120218.9450@canterbury.ac.nz> <15497@hydra.gatech.EDU> <2176@lupine.NCD.COM> <42310@mips.mips.COM> <42483@mips.mips.COM> Sender: pcg@aber-cs.UUCP Organization: Coleg Prifysgol Cymru Lines: 31 Nntp-Posting-Host: odin In-reply-to: mash@mips.COM's message of 29 Oct 90 19:44:09 GMT mash> As is well-known, we are working hard with our colleagues at mash> B.I.T. to improve yields on the ECL chips. On 29 Oct 90 19:44:09 GMT, mash@mips.COM (John Mashey) said: mash> In article mash> pcg@cs.aber.ac.uk (Piercarlo Grandi) writes: pcg> In the latest issue of Byte I read that BIT have *dumped* the R6000 pcg> development. Am I hallucinating? ..... mash> Yes, or Byte is. Well, I must post a correction; my recollection was inexact. The source is PCW (Byte clone in the UK) and it quotes some USA newsletter, and DEC sources. What is reported is that in light of what is called a 'disaster' (John Mashey himself was not happy at having several expensive machines that cannot be delivered) at BIT on the R6000, DEC (but not MIPS or BIT) have pulled out of the R6000 development, citing as reason that they reckon they will have equivalent CMOS technology not much later than BIT will have the R6000 ready, thus reducing the ECL opportunity window to one or at most two years. This is sad, because I like ECL (for affective reasons, let's say). -- Piercarlo "Peter" Grandi | ARPA: pcg%uk.ac.aber.cs@nsfnet-relay.ac.uk Dept of CS, UCW Aberystwyth | UUCP: ...!mcsun!ukc!aber-cs!pcg Penglais, Aberystwyth SY23 3BZ, UK | INET: pcg@cs.aber.ac.uk