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From: sysmgr@KING.ENG.UMD.EDU (Doug Mohney)
Newsgroups: comp.arch
Subject: Re: processor for graphics terminal [was: PC/AT clones with RISC cpu]
Message-ID: <0093F1A8.A28E4920@KING.ENG.UMD.EDU>
Date: 2 Nov 90 13:53:36 GMT
References: <2081@aber-cs.UUCP> <0093F0E4.0B02A980@KING.ENG.UMD.EDU>,<1990Nov2.000650.18866@jarvis.csri.toronto.edu>
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Reply-To: sysmgr@KING.ENG.UMD.EDU (Doug Mohney)
Organization: The U. of MD, CP, CAD lab
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In article <1990Nov2.000650.18866@jarvis.csri.toronto.edu>, jonah@dgp.toronto.edu (Jeff Lee) writes:

>>I guess the best bet would be a modified PC-clone, with the built-in Ethernet,
>>some support for a local disk, and an option to replace/toggle-between the
>>ROMs for bootup. 
>
>A group here is tossing around a similar idea, but minus the disk
>controller and (possibly) plus a SCSI port, with SIMMs for memory
>(1/4/16MB).  However, we're considering a RISC processor in place of
>the 386 (running at memory speeds to eliminate the cache and reduce the
>chip count). 

Doesn't count :-) PC compatability (for better or worse) and decent X-term
capability would be more better. I suppose you could be really perverted, use a
RISC processor and stick in Soft-PC in ROMs. Flip a switch and that $2000+
X-term becomes a $1000 PC-clone. Aw nuts, you'd still need to throw in a disk
controller for a 3 1/2" floppy, and you'd probably have to hack the Soft-PC
up a bit to support SCSI disk storage. 

>Does anyone working on current small systems design have
>any suggestions on how easily [i.e using little glue] current
>processors (29K, 88K, MIPS, SPARC, or even [34]86, 680[34]0, or ???)
>would or would not fit into such a low-chip count, low-end,
>low-quantity(?) product?  Also, how easy is it to add an FPU along
>with those chips that don't include it?

You might wanna look at how the SparcStation SLC was put together; I understand 
there are a couple of companies offering up glue chip-sets for Sparc.