Path: utzoo!attcan!uunet!midway!ncar!elroy.jpl.nasa.gov!usc!ucsd!ucbvax!PENNDRLS.BITNET!DAVID
From: DAVID@PENNDRLS.BITNET
Newsgroups: comp.lang.forth
Subject: Re: FORTH on RISC processors
Message-ID: <9010311401.AA07576@ucbvax.Berkeley.EDU>
Date: 29 Oct 90 15:09:57 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Reply-To: DAVID%PENNDRLS.BITNET@SCFVM.GSFC.NASA.GOV
Organization: The Internet
Lines: 15

You might want to check out a book previously mentioned by someone
else (I forget who) on this conference:

  Interpretation and Instruction Path Coprocessing
  Debaere & van Campenhout, MIT Press 1990.
  ISBN 0-262-04107-3

The first half of this book gives an in depth analysis of the
interpretation process, with special attention to speed/size tradeoffs
and optimization techniques.  RISC processors are discussed, with some
specific notes on the principles an optimizing compiler would need to
follow to produce fast code.  Most of the issues mentioned by Mr.
Koopman in his posting are covered by this book.

-- R. David Murray    (DAVID@PENNDRLS.BITNET, DAVID@PENNDRLS.UPENN.EDU)