Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!usc!ucsd!pacbell.com!att!emory!ogicse!intelhf!agora!billsey
From: billsey@agora.uucp (Bill Seymour)
Newsgroups: comp.sys.amiga.hardware
Subject: Re: A2630 Faster RAM?
Message-ID: <1990Oct31.003406.24700@agora.uucp>
Date: 31 Oct 90 00:34:06 GMT
References: <5329@crash.cts.com>
Organization: Open Communication Forum
Lines: 33

In article <5329@crash.cts.com> lkoop@pnet01.cts.com (Lamonte Koop) writes:
:I have a question about the A2630 030 accelerator.  It's fairly well known
:that replacing the standard 100ns DRAMs on the board with 80ns RAM will allow
:the board to run somewhat faster.  Here's the question: HOW?  The A2630 uses a
:3 wait state design...what control logic determines if it can run faster?
:[I realize a 680x0 memory access is an assertion of Address Strobe on the bus,
:with the cpu placing the address on the address lines, and the memory device
:returning DTACK (or with an 030 or 020, DSACK0 and DSACK1 to accommodate
:different port size activity), but could someone (Dave?) kindly explain waht
:exactly is allowing that faster speed access [something just doesn't seem to
:fit here]) Many thanks in advance.

	You're getting the 2620 and 2630 confused here. With the 2620, you
can change to 80ns RAMs and move a jumper for about a 17% speed increase.
You *cant* do that with the 2630. They just didn't design it in... (You 
would have to go quite a bit faster than 80ns anyway... Probably 60ns would
allow you to remove a wait state, but 60ns just weren't around when the 2630
was being designed.) With either board, you can replace the MCU with a faster
version and add a second oscillator to clock it faster. You could possibly
(with a lot of hacking) go to a faster processor on the 2630, no way on the
2620...

:--LaMonte
:
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-- 
     -Bill Seymour                                            billsey@agora
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