Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!mips!winchester!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.sys.m88k Subject: Re: Crystal Balls Message-ID: <42609@mips.mips.COM> Date: 1 Nov 90 19:16:15 GMT References: <1990Oct14.003906.26373@wolves.uucp> <1536@ftc.framentec.fr> <1990Oct19.120218.9450@canterbury.ac.nz> <656404917.9119@proa.sv.dg.com> <1095@dg.dg.com> <42589@mips.mips.COM> <10947@pt.cs.cmu.edu> Sender: news@mips.COM Reply-To: mash@mips.COM (John Mashey) Organization: MIPS Computer Systems, Inc. Lines: 69 In article <10947@pt.cs.cmu.edu> lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes: >In article <42589@mips.mips.COM> mash@mips.COM (John Mashey) writes: >Five quarters late, on a four-year projection. Middling. >>Vendors often have plans they believe in, and things just >>don't work that way, and t his happens to almost everybody... > >Ah, not to be mean about it, but isn't the R4000 overdue? And that >85 MHz R6000? Come to think about it: does anyone remember ANY chip >that came in early? re: 85MHz R6000: huh? (The system product was originally announced at 67.5MHz, and that was close, if a little optimistic.l) re: R4000: there is, of course, no announced product called this... Sorry, the only reason I didn't say "everybody" was to allow for the possibility that somewhere, sometime, someone has described leading-edge, aggressive plans, 5 years in advance, that actually happened that way. I thought I'd worded this clearly enough not to single out Motorola, but include just about everybody. I'd NEVER claim that everything we think of happens that way. I included the Moto examples, because I just happened to have a copy of that presentation handy, but I thought I made it clear that leading-edge stuff is HARD, and that it is very easy, hearing one side of these things, and NOT having past track record info available, to become very impressed with ANYBODY's futures. When I give nondisclosure presentations, people DEMAND to hear a futures pitch that goes out 10 years. At any given time, we have a path that goes out a ways, and I'm usually willing to describe it, with the serious caveat that things will change by the time we get there. How could they not? In each round of architectural analysis, you fine-tune: -the set of benchmarks you use, whose statistics keep changing because the compilers do also, and because new programs become relevant. -features you must include, in some cases, in response to features other people include, that you don't know about when you make the first chart. -even if you know what you WANT to do, you may discover it STILL doesn't all fit on the chip, and you have to make (relatively) last-minute tradeoffs. -feedback you get from customers, from the last one. Think about that: it is purest B.S. to tell somebody you know exactly what you're going to do for 10 years, because it means you are NOT going to listen to your customers AT ALL.... and beyond that, even if you have very detailed schedules, and design rules for several generations of processes, and even though some elements of process technology may be predictable, there are still surprises that change your mind. So, it is reasonable to lay out a future directions thing, but it is pretty hard to really be exact on chips whose architectural work hasn't even started. It is very frustrating to give somebody a futures pitch with the same realistic caveats that any engineer, in any company would believe, and be told that the caveats are no good, because company XYZ has "committed" to them a chip in 1997 with X MIPS, and Y MFLOPS, and why can't we do that? (well, the marketeers committed that, not the engineers, that's why....) Anyway, one more time: Look hard at past track records of: performance predictions (are they close, or way off) delivery bug-level when delivered, and record in squashing them Don't take ANYTHING, on faith, from anybody -- -john mashey DISCLAIMER: UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086