Path: utzoo!attcan!uunet!zaphod.mps.ohio-state.edu!usc!jarthur!nntp-server.caltech.edu!ggumby!tim From: tim@ggumby.cs.caltech.edu (Timothy L. Kay) Newsgroups: comp.sys.next Subject: Re: 4 MBytes Simms Message-ID: Date: 29 Oct 90 06:41:26 GMT References: <9010290610.AA01815@mcs-server.gac.edu> Sender: news@nntp-server.caltech.edu Organization: California Institute of Technology, Pasadena Lines: 15 Nntp-Posting-Host: ggumby.cs.caltech.edu scott@NIC.GAC.EDU writes: >It would also be nice if the new cubes allowed those extra 2 or 4 mm >for clearance, so that they don't require the (generally) more expensive >very-low-profile chips. Such mods are well within NeXT's reach. >Besides the fact that the 16M chips which are coming along will >probably need just a teeny bit more, also . . . It is my understanding that the pinout for 16 MB SIMMs won't be compatible with the pinout for 256 KB, 1 MB, and 4 MB SIMMs. There simply aren't any more address lines available on the standard JEDEC SIMM. Can anybody confirm this? Tim