Path: utzoo!utgpu!watserv1!watmath!att!att!bu.edu!rpi!zaphod.mps.ohio-state.edu!lavaca.uh.edu!menudo.uh.edu!sugar!ficc!peter From: peter@ficc.ferranti.com (Peter da Silva) Newsgroups: comp.arch Subject: Re: loadable control store, an idea whose time has gone Message-ID: Date: 3 Nov 90 16:13:31 GMT References: <1536@ftc.framentec.fr> <1990Oct19.120218.9450@canterbury.ac.nz> Organization: Xenix Support, FICC Lines: 14 Microcode, macros, inline code. What are we talking about here? Fast subroutine calls with low overhead that don't blow the cache, right? How about having a shared memory segment in very fast memory (as fast as the cache) that's readonly to the process. Since it's fast, bypass the cache. Write your micros as some sort of low-overhead subroutines (trap, maybe, or just copy return address to a register and jump... they're sure as hell not gonna be recursive!) and put them in there. This would give you most of the advantage of writable control store, and you could implement it on current CPUs. (be sort of like programming the 1802) -- Peter da Silva. `-_-' +1 713 274 5180. 'U` peter@ferranti.com