Path: utzoo!attcan!uunet!mcsun!ukc!edcastle!aiai!richard
From: richard@aiai.ed.ac.uk (Richard Tobin)
Newsgroups: comp.arch
Subject: Re: processor for graphics terminal [was: PC/AT clones with RISC cpu]
Message-ID: <3698@skye.ed.ac.uk>
Date: 5 Nov 90 19:09:03 GMT
References: <2081@aber-cs.UUCP> <0093F0E4.0B02A980@KING.ENG.UMD.EDU> <1990Nov2.000650.18866@jarvis.csri.toronto.edu> <0093F1A8.A28E4920@KING.ENG.UMD.EDU> <1990Nov3.052952.1786@zoo.toronto.edu>
Reply-To: richard@aiai.UUCP (Richard Tobin)
Organization: AIAI, University of Edinburgh, Scotland
Lines: 24

In article <1990Nov3.052952.1786@zoo.toronto.edu> henry@zoo.toronto.edu (Henry Spencer) writes:
>Both [PC compatibility and X] do terrible things to your system design if you
>enshrine them as fundamental goals.  (Retaining the potential for them, on
>the other hand, is easy:  any fast CPU with a large address space can
>emulate the early Intel processors at higher speed than Intel chips, and
>X is not difficult to port to a sane machine with a clean frame buffer.)

I would be interested to hear you elaborate on this - in particular,
what does "enshrining X as a fundamental goal" involve other than
having "a sane machine with a clean frame buffer".

[Which reminds me: I was recently reading the "documentation" that
came with a super VGA board, and was disgusted to see that it can only
be addressed 128k at a time - you have to change banks by outputting
something to a port.  It occurred to me that this could all be hidden
behind the 386's paging; have a 512k area with only 128k mapped and
switch banks when you get a page fault.  Has anyone tried this?  Would
it be fast enough?  Followups to somewhere sane, please.]

-- Richard
-- 
Richard Tobin,                       JANET: R.Tobin@uk.ac.ed             
AI Applications Institute,           ARPA:  R.Tobin%uk.ac.ed@nsfnet-relay.ac.uk
Edinburgh University.                UUCP:  ...!ukc!ed.ac.uk!R.Tobin