Path: utzoo!attcan!uunet!mcsun!ukc!dcl-cs!aber-cs!athene!pcg From: pcg@cs.aber.ac.uk (Piercarlo Grandi) Newsgroups: comp.arch Subject: Re: The CPU with 3 brains Message-ID: Date: 5 Nov 90 19:52:29 GMT References: <42737@mips.mips.COM> <1990Nov4.014901.23819@zoo.toronto.edu> Sender: pcg@aber-cs.UUCP Organization: Coleg Prifysgol Cymru Lines: 17 Nntp-Posting-Host: odin In-reply-to: henry@zoo.toronto.edu's message of 4 Nov 90 01:49:01 GMT On 4 Nov 90 01:49:01 GMT, henry@zoo.toronto.edu (Henry Spencer) said: henry> In article <42737@mips.mips.COM> mark@mips.COM (Mark G. Johnson) writes: henry> Actually, I suggested something like this quite a while ago, when some henry> Intel bigshot had mumbled in public about soon being able to put four henry> CPUs on a single chip and what can we possibly do with it all. If you're henry> Intel, it's obvious: one 860, one 486, one 80960, and fill up the last henry> slot with odds and ends like 8080, 8008, 4004, 2920, etc. Then you at henry> last have compatibility among Intel CPUs: one chip runs software for henry> any of them! Except for oddities like the 860 and 960, isn't the 486 still designed to be almost binary compatible with the 8008? Sigh! -- Piercarlo "Peter" Grandi | ARPA: pcg%uk.ac.aber.cs@nsfnet-relay.ac.uk Dept of CS, UCW Aberystwyth | UUCP: ...!mcsun!ukc!aber-cs!pcg Penglais, Aberystwyth SY23 3BZ, UK | INET: pcg@cs.aber.ac.uk