Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!ucsd!sdd.hp.com!uakari.primate.wisc.edu!aplcen!haven!mimsy!chris From: chris@mimsy.umd.edu (Chris Torek) Newsgroups: comp.arch Subject: chip cost Message-ID: <27547@mimsy.umd.edu> Date: 8 Nov 90 17:49:32 GMT References: <35325@cup.portal.com> <1990Oct30.210852.15087@mozart.amd.com> <2857@crdos1.crd.ge.COM> Organization: U of Maryland, Dept. of Computer Science, Coll. Pk., MD 20742 Lines: 43 In article <2857@crdos1.crd.ge.COM> davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) writes: >The cost is a factor of die size and process. The cost of the same area >in 2.5 micron CMOS (static memory) is a lot less than the same area filled >with 0.8 micron CMOS (a CPU). If it was really cheaper to use less area >everyone would use 6000 angstrom design rules for everything, right? A good point (although I can think of various objections). As I understand it (this information comes from my younger brother, who is doing device research at Penn State) you can shrink as much as you want. The problem is that yeild goes to zero. (`We put 100 billion angels on the head of this pin. The only problem is, they are all dead.' `Yeah, but can they still dance?' :-) ) There are two main reasons for this. One is dirt: one small speck on a 1.2u line is not necessarily a disaster; the same speck on a .6u line is. The other is solid state physics matters that are way over my head (my brother has been heard mumbling something about `hot electrons'). Anyway, assuming equipment and processing costs are equal for all sizes (probably false, but...), all you have to do is maximize n_working_chips in the following: area(chip) ~= devices(chip) * size(process) n_chips = area(die) / area(chip) P(dirt on chip) = total_dirt_on_die / area(chip) [*] P(failure) = P(dirt) * coefficient(process) n_working_chips = n_chips * (1.0 - P(failure)) [* assumes uniform random distribution] If coefficient(process) is a curve, this makes n_working_chips a corresponding curve (if my rusty mathematical mental imaging is still functioning). If it were a constant then minimizing area would be best since a finite number of specks of dirt would take out a finite number of chips (~1 each) as n_chips approaches infinity, so that n_working_chips would also approach infinity. (This of course assumes infinitely small dirt. :-) ) Therefore it must be a curve; you want the point where n_chips is large but coefficient(process) is still fairly small. -- In-Real-Life: Chris Torek, Univ of MD Comp Sci Dept (+1 301 405 2750) Domain: chris@cs.umd.edu Path: uunet!mimsy!chris