Path: utzoo!utgpu!watserv1!watmath!att!att!linac!pacific.mps.ohio-state.edu!zaphod.mps.ohio-state.edu!wuarchive!emory!hubcap!apfiffer From: apfiffer@admin.cse.ogi.edu (Andy Pfiffer) Newsgroups: comp.parallel Subject: Re: T800 - how fast is it really? Keywords: transputer IRIS t800 parallel Message-ID: <11422@hubcap.clemson.edu> Date: 7 Nov 90 14:14:10 GMT References: Sender: fpst@hubcap.clemson.edu Organization: Selling Pencils in Beaverton, OR Lines: 45 Approved: parallel@hubcap.clemson.edu In article robert@zeus.ee.uwa.oz.au (Roberto Togneri) writes: >ain't easy) I ran two similar programs on the IRIS and a t800. >And lo! The IRIS was 5 times faster. Is this expected? >How fast are the t800's? How good is the compiler? What am I >doing wrong? Although you don't indicate which model Iris (some have R2000+2010, others have R3000+3010 clocked at a variety of freqs.), I'm surprised that your T800 actually performed that well. My rule-of-thumb (based on experience with actual, real-life customer code) is that a 20MHz T800 with a simple external memory interface is approximately equal to a MC68020-20 + MC68881. Mitigating factors: o If you're code has a sqrt() in the inner loop, the T800 will perform well. o If you're code can operate on data that resides in on-chip RAM and your subroutine can fit in there too (ruling out large arrays), the T800 will perform well. o If you're code is written in Occam, your code will show unmeasurable performance gains over nearly any other platform. :^) o Compilers. o External memory interfaces. Smarter, page-mode DRAM memories or SRAM memories may give you a 10% to 100% boost in performance. o Any modern RISC chip. >-- >Dr. Roberto Togneri >Dept. of EE Engineering Phone: +61-9-380-2535 >The University of Western Australia Fax: +61-9-380-1065 >NEDLANDS WA 6009 Email: robert@swanee.ee.uwa.oz.au -- Andy Pfiffer (503) 645-1886 apfiffer@admin.ogi.edu Formerly w/ Cogent Research, Formerly w/ Topologix, Formerly w/ Theory Center. "To determine where to resume execution upon leaving the trap handler, examine the instruction at address fir - 4. If this instruction is not a delayed control instruction, the execution resumes at the address in fir - 4."