Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!ucsd!ucbvax!bloom-beacon!eru!hagbard!sunic!news.funet.fi!nokikana.tut.fi!kp74615 From: kp74615@nokikana.tut.fi (Karri Tapani Palovuori) Newsgroups: comp.sys.amiga.hardware Subject: DOE-signal Message-ID: <1990Nov7.085624.23235@funet.fi> Date: 7 Nov 90 08:56:24 GMT Sender: news@funet.fi (#News ) Reply-To: kp74615@nokikana.tut.fi (Karri Tapani Palovuori) Organization: Tampere University of Technology, Finland Lines: 13 Hi, My Technical Reference Manual (B2000) claims (on page 82) that 'the signal's (=DOE) timing changes from read cycle to write cycle'. During read cycles it enables PIC's data drivers but what about write cycles? Could I use it as 'data on bus is correct' -signal during processor writes? Karri