Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!rutgers!cbmvax!daveh From: daveh@cbmvax.commodore.com (Dave Haynie) Newsgroups: comp.sys.amiga.hardware Subject: Re: RISC Amiga Message-ID: <15759@cbmvax.commodore.com> Date: 9 Nov 90 17:08:10 GMT References: <1178@iceman.jcu.oz> <39367@ut-emx.uucp> Reply-To: daveh@cbmvax.commodore.com (Dave Haynie) Organization: Commodore, West Chester, PA Lines: 50 In article <39367@ut-emx.uucp> amiga@ccwf.cc.utexas.edu (Paul) writes: >I think the bet solution to having a RISC processor is to have an accelerator >board with the 040 and a RISC. The 040 would do most of the propriatory code >while the RISC would be used for FFP and other such math through the use of >libraries. While I think it would be fun and interesting to have a RISC coprocessor to play with, there are two flaws in using it for your math: 1) The 68040 floating point should be very comparable to any standard general purpose RISC chip, like a Sparc or R3000. Certainly some DSPs and the i860 could run rings around any of these under the right circumstances. That brings us to 2) The math libraries are too finely grained. For math intensive stuff, any in-line 680x0 FPU codes are going to run MUCH faster than any math library calls. Plus you get floating point variables, which you don't get between math library calls. For a good portion of the math library functions, the overhead of the call is a large portion of the cycle count for the function on any system with a hardware FPU. The math libraries are a good thing, in that they give you a standard math interface for any Amiga CPU. And, at least with the IEEE libraries, the functions will run faster with a math chip in the system. Which is OK for things like spreadsheet recalculations or other relatively short lived math functions. But nothing you're going to want to have during a 12 hour ray tracing session. What's really required to take advantage of some faster math processing units is a higher level math function library. Something that supports matrix multiplications, fourier and S transforms, etc. If you make the function itself, even on a fast math chip, last significantly longer than the function call overhead, you have a winning situation. But calling the IEEE library simply to do a 64 bit floating point multiply is already a loss on a 68030 system; making you i860 do the multiply isn't going to speed anything up there. >The RISC would have to have it's own section of memory but it would also need >access to the Main Bus (i.e. access to fast mem). Just thinking about it, >wouldn't the MIPS 3000 be a great replacement for the Blitter! On the A3000, the 68030 already can do a number of video things significantly faster than the blitter. >Amiga@walt.utexas.edu .....Paul...... -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Standing on the shoulders of giants leaves me cold -REM