Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!apple!julius.cs.uiuc.edu!zaphod.mps.ohio-state.edu!ub!uhura.cc.rochester.edu!rochester!cornell!johnhlee From: johnhlee@flute.cs.cornell.edu (John H. Lee) Newsgroups: comp.sys.amiga.hardware Subject: Re: RISC Amiga WHat's RISC? Message-ID: <48152@cornell.UUCP> Date: 9 Nov 90 21:19:05 GMT References: <1178@iceman.jcu.oz> <39367@ut-emx.uucp> <15759@cbmvax.commodore.com> Sender: nobody@cornell.UUCP Reply-To: johnhlee@cs.cornell.edu (John H. Lee) Organization: Cornell Univ. CS Dept, Ithaca NY Lines: 52 Summary: Followup-To: In article yorkw@pasture.ecn.purdue.edu (Willis F York) writes: >I know RISC means Reduced INstruction Set Computer (Or Close) > >But what does this mean? >The CPU chip has Fewer Commands (oops Instructions) that it knows how >to run? What's the big deal about that? OR an it to those few REAL fast? No question is ever stupid, and novices aren't the only ones to ask this particular one. A CISC (Complex Instruction Set Computer) CPU like the beloved 68000 usually requires several cycles (4-16 and more, for example) of its clock to execute a single instruction, primarily because of the complexity needed to decode instruction that basically do *everything*, like 32 bit multiplies, divide, save all registers on stack and jump to subroutine while saving return address on stack, etc. This means a 7MHz 68000 is executing nowhere near 7 million instructions per second. RISC CPU is based on the philosophy that if we cut down on the instructions supported by the CPU, we can make every instruction use only *1* clock cycle, then we can make things go much faster and do more than a CISC at the same speed. Moreover, this makes a RISC simpler, smaller, and easier to design and manufacture. So RISCs support and optimize only a small set of core instructions and replace the complex instructions with a set of smaller ones. But analysis of most programs show that the majority of the instructions executed are simple things like MOVEs and branches, so the overall speed increase is very healthy. A RISC CPU at 7MHz is indeed executing 7 million instructions per second. RISC CPUs also tend to be available in faster parts, because of their simpler design. Another advantage is that most programs are compiled from a higher-level language, and it is difficult for compilers and compiler writers to utilize the more complex instructions anyways. Almost all compilers will use simpler instructions instead of the complex ones. There are disadvantages, though. First off, programs compiled for RISC systems are larger, obviously. I've seen 30% larger on average quoted. Also, to achieve 1 cycle/instruction, compilers still have to do some optimizations and handle special cases. So all is not bliss. Additionally, the CISC camp have been busy using some RISC techniques so that now some CISC CPU's are nearing the 1 cycle/instruction mark without the disadvantages of RISC CPUs (I think the 68040 is reportedly 1.4 cycles/ instruction for some instruction mixes.) But for now, RISCs are faster, simpler, and cheaper. ------------------------------------------------------------------------------- The DiskDoctor threatens the crew! Next time on AmigaDos: The Next Generation. John Lee Internet: johnhlee@cs.cornell.edu The above opinions of those of the user, and not of this machine.