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From: bwhite@oucsace.cs.OHIOU.EDU (Bill White)
Newsgroups: comp.theory.cell-automata,sci.electronics
Subject: Re: John Conway's "Life"/Pseudo-Neural hardware implementation
Message-ID: <2371@oucsace.cs.OHIOU.EDU>
Date: 2 Nov 90 18:40:10 GMT
References: <1990Nov1.185409.25802@bradley2.bradley.edu> <10440@milton.u.washington.edu>
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In article <10440@milton.u.washington.edu> whit@milton.u.washington.edu (John Whitmore) writes:
>	The lowest parts count cell I've seen uses analog techniques;
>you use a summing junction (resistors) and two comparators (one
>for 'starvation', one for 'nonsupport') with two latches.  The output
>of latch#2 is the cell state (and feeds the summing junctions of
>the node and its neighbors).  Latch #1 takes its input from the
>AND of the two comparators (if both conditions for cell survival
>are met, it'll be there next turn); its output feeds latch#2,
>on a slightly delayed clock (to allow for skew in the comparators).

	I've actually built such a beast.  I designed and built it
exactly the same as you describe (the above is pretty much the optimal
solution, and not that hard to come by).  In theory, it'd be easier,
I'm sure, to use a "bucket-brigade" of two storage elements, if one
were to put the whole LIFE cell on a chip; but for discrete components
I just used a latch chip.
	Each "cell" is a little cube, with an LED on the front (I wanted
to use a 2cm x 2cm LCD "shutter", but couldn't find one cheap), and pin
and socket contacts all around.  Each face (up,down,left,right) has
four pins and four sockets, and they plug together to make an arbitrarily
large array.
	Internal configuration has the four immediate neighboring cells'
outputs fed additionally out through one quarter-turn rotation, and the
input from a quarter-turn rotation goes into the comparators as well;
this allows all eight neighbors (four diagonal as well as four immediate)
to be connected without using actual octagonal pin configurations.
	It sounds complicated, but it isn't.  Basically, if you have
cells ABCDEFGHI as follows:

			A B C
			D E F
			G H I

Cell A's output gets fed through D into E, cell G's through H into E,
cell I through F into E, cell C through B into E.  And so on.

	In addition, there are clock lines and power lines, which I
implemented as one pin/socket pair horizontally (+5V and ground),
and one pin/socket pair vertically (two phase-offset clocks).  The
horizontal pin/socket and vertical pin/socket were not interchangable;
thus the cells couldn't be plugged in with power going into the clock
and vice-versa.

	I only built three; it was too hard to do without some form
of mass-production which I don't have access to.  I still have the
schematic if anyone wants it (if I can find it).  I never got it
clocking really fast, tho.

	I also designed (but didn't build) variant cells such as a
pseudo-random-noise generator (using a 5XXX white noise generator), 
a true-random-noise generator (using a cheap op-amp), an "edge reflector"
unit, various cell types, etc.  In theory, any cellular automaton
system could be implemented, provided it only took into account a limited
number of neighbors.

	As for mass production, the best for a binary-output (on/off)
CA might be a single-chip decoder.  Possibly even a ROM -- after all,
it'd only be 256 bits, and that'd fit onto a chip with two latches,
no problem.
	Anyone out there rich?

>		John Whitmore
>		whit@milton.u.washington.edu


-- 
|   Bill White			Internet: bwhite@oucsace.cs.ohiou.edu	|
|	MR. COLE'S AXIOM:						|
|		The sum of the intelligence on the planet is 		|
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