Path: utzoo!attcan!uunet!mcsun!ukc!dcl-cs!aber-cs!athene!pcg From: pcg@cs.aber.ac.uk (Piercarlo Grandi) Newsgroups: comp.arch Subject: Re: The CPU with 3 brains Message-ID: Date: 8 Nov 90 15:19:19 GMT References: <133259@pyramid.pyramid.com> Sender: pcg@aber-cs.UUCP Organization: Coleg Prifysgol Cymru Lines: 80 Nntp-Posting-Host: odin In-reply-to: moliver@shadow.pyramid.com's message of 6 Nov 90 23:05:22 GMT On 6 Nov 90 23:05:22 GMT, moliver@shadow.pyramid.com (Mike Oliver) said: moliver> In article <39409@ucbvax.BERKELEY.EDU> moliver> jbuck@galileo.berkeley.edu (Joe Buck) writes: jbuck> In article <2841@crdos1.crd.ge.COM>, davidsen@crdos1.crd.ge.COM jbuck> (Wm E Davidsen Jr) writes: davidsen> In article davidsen> pcg@cs.aber.ac.uk (Piercarlo Grandi) writes: pcg> ... isn't the 486 still designed to be almost binary compatible pcg> with the 8008? Sigh! davidsen> The instruction set is 100% diferent, so the only binary davidsen> compatibility is that they both will read ones and zeros. Well, the *encoding* of the instruction set is 100% different, but the flavour of the register level architecture has been carefully preserved -- the 8008 architecture is actually a *subset* of the 486 one. It is much the same story as the HP1000 line of machines, or the Pr1me series 50 one. Backwards compatibility at any cost. jbuck> Well, they are pretty much compatible at the assembly language jbuck> level. When the 8086 was first announced, one of Intel's big jbuck> claims was that, although the binary encoding had changed, you jbuck> could reassemble your 8080 programs and they would run on the jbuck> 8086. moliver> Nope. Intel claimed that large chunks of your ASM80 code could moliver> be massaged into ASM86 with the assistance of some program [... moliver> but in the end ... ] it was faster and ultimately more reliable moliver> to recode by hand. Well, isn't the distance between claim and reality always a bit large? Still: moliver> Piercarlo is wrong, possibly pending some better definition of what moliver> "almost binary compatible" means. Well, I stretched things a bit here :-), "almost" is used in a less usual qualitative sense, not the more common quantitative one. "Almost binary" was indeed meant to be "at the assembler/architecture level". The 8086 was consciously and unconsciously designed as the successor to the 8080, and effort was expended to make it feel as familiar as possible to 8080 programmers, for obvious commercial reasons. Consider: NEC sells a processor that can run both 8080 and 8086 programs (the V20). I doubt that apart from the decoder there is much difference between the implementations of two modes. I think that it would not have been that easy to haven 8086/6502 chip instead. And indeed note that you cannot (I am not that usre on this) run concurrently 8080 and 8086 programs on the chip, i.e. it does not have two fully distinct CPUs. Incidentally: this shows that Mark Johnson's perverse idea on multiple CPUs on a chip is not entirely new... My point was the same that is repeated here and there in the Isaacson et. al. book on the 386 - the 80386 was designed to be broadly backwards compatible with the 8086, which was designed to be broadly backwards compatible with the 8080, which was designed to be broadly backwards compatible with the 8008. This bible like lineage still is apparent in many architectural aspects of the 80386 architecture, which indeed does still uncannily resemble that of the 8008 -- a matter of degree, of course, but strong enough. In a private e-mail message (still thinking over it) I received a claim that the 80x86 architecture is the best micro CISC around, the argument being that the essential flavour of its architecture is uniquely suited by design to be implemented as a micro -- for example dedicated registers (a feature that I like, incidentally). Whatever the merit of this claim, it is essentially based on the idea that the 8008/8080/8086/80386 lineage is the right one. This may be disputed, but it is intriguing to note the argument. -- Piercarlo Grandi | ARPA: pcg%uk.ac.aber.cs@nsfnet-relay.ac.uk Dept of CS, UCW Aberystwyth | UUCP: ...!mcsun!ukc!aber-cs!pcg Penglais, Aberystwyth SY23 3BZ, UK | INET: pcg@cs.aber.ac.uk