Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!apollo!vinoski
From: vinoski@apollo.HP.COM (Stephen Vinoski)
Newsgroups: comp.arch
Subject: Re: chip cost
Message-ID: <4de91485.20b6d@apollo.HP.COM>
Date: 9 Nov 90 21:38:00 GMT
References: <35325@cup.portal.com> <1990Oct30.210852.15087@mozart.amd.com> <2857@crdos1.crd.ge.COM> <27547@mimsy.umd.edu> <2862@crdos1.crd.ge.COM>
Sender: root@apollo.HP.COM
Reply-To: vinoski@apollo.HP.COM (Stephen Vinoski)
Organization: Hewlett-Packard Company, Apollo Division; Chelmsford, MA
Lines: 17

The cost of the testing component of chip production continues to rise as
geometries shrink and pin count increases.  This is mainly because the
gate-to-pin ratio keeps climbing, resulting in faults which are difficult to
test via traditional test methods because they're buried so deep inside the
device.  (Methodologies such as scan testing are helping to reduce this cost.) 
Another part of the test cost is the test hardware required to really put the
device through its paces; some VLSI test systems cost over 5 million dollars,
and guess who ultimately pays for it...


-steve


| Steve Vinoski  (508)256-6600 x5904       | Internet: vinoski@apollo.hp.com  |
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