Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!apple!baum
From: baum@Apple.COM (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: registerless architecture
Message-ID: <46549@apple.Apple.COM>
Date: 13 Nov 90 18:02:00 GMT
References: <1990Nov12.145410.29035@cs.cmu.edu> <3168@ns-mx.uiowa.edu> <39637@ut-emx.uucp>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 43

[]
I can't let all this stuff go by without my three cents...
>In article <39637@ut-emx.uucp> nather@ut-emx.uucp (Ed Nather) writes:
>In article <3168@ns-mx.uiowa.edu>, jones@pyrite.cs.uiowa.edu writes:

>> > Has anyone every thought about or done a registerless architecture?

As many posters have pointed out, most stack architectures can be considered
registerless, in the sense that they can be built without physical registers,
and, if registers were implemented, could not address them directly.

>Many years ago there was this microprocessor, see,...The thing HAD NO
>REGISTERS either, went memory-to-memory because that's where everything
>ends up anyway, so what good are registers?  It was made by... Texas
>Instruments..... it was a >real dog, much too slow .....

Actually, there was at least one implementation of the TI9900 that was fast...
because they put registers in, but I don't remember if it block-loaded
them when the register pointer was switched,( like the Intel 960 does)
or if they were a register-cache.

The CRISP is in some sense the ultimate expression of the registerless
machine. It is a stack architecture, but at the same time it is a 2
1/2 address machine. It can be built with no physical registers, or
can have many. The physical registers are used as a cache. If an
interrupt occurrs, the SP is changed, and accesses off the stack
pointer suddenly miss. It is not required to mess with the
'stack-cache at that point, although it makes mucho sense from a
performance point of view. Note that getting to interrupt code is very
fast- there aren't many things that must be saved, but can if you
want, for performance reasons.  The thing that makes CRISP a bit
different is that the 'cache' is not automatically loaded on a miss;
special function call instructions do that.

Note that there have been register architectures which had no physical
registers, notably the early DEC PDP-10s (and maybe PDP-6s?), where the
registers overlayed the first 16 memory locations, and there was an 
option that installed real registers. I think I remember reading that
no PDP-10 was sold without the option. Hmmmm.

--
		  baum@apple.com		(408)974-3385
{decwrl,hplabs}!amdahl!apple!baum