Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!zaphod.mps.ohio-state.edu!ub!uhura.cc.rochester.edu!rochester!pt.cs.cmu.edu!gandalf.cs.cmu.edu!lindsay From: lindsay@gandalf.cs.cmu.edu (Donald Lindsay) Newsgroups: comp.arch Subject: Re: 1 double or 2 singles Message-ID: <11084@pt.cs.cmu.edu> Date: 13 Nov 90 18:15:40 GMT References: <11054@pt.cs.cmu.edu> <2511@charon.cwi.nl> Organization: Carnegie-Mellon University, CS/RI Lines: 12 > trick, whereby a floating point pipe can deliver one double precision > result per clock, or else deliver two single precision results per > clock. Private email has turned up: >The <..> processor does this. The next generation <..> will not; it >costs more silicon and more critical paths to do it than to build >separate units. -- Don D.C.Lindsay