Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!zaphod.mps.ohio-state.edu!julius.cs.uiuc.edu!ux1.cso.uiuc.edu!ux1.cso.uiuc.edu!m.cs.uiuc.edu!faiman From: faiman@m.cs.uiuc.edu Newsgroups: comp.arch Subject: Re: registerless architecture Message-ID: <3300215@m.cs.uiuc.edu> Date: 13 Nov 90 19:17:00 GMT References: <145410@<1990Nov12> Lines: 12 Nf-ID: #R:<1990Nov12:145410:m.cs.uiuc.edu:3300215:000:458 Nf-From: m.cs.uiuc.edu!faiman Nov 13 13:17:00 1990 For Ed Nather at UT-Austin .... It was the TI 9900 (RIP). See, for example, "16-bit Microprocessor Architecture," by Terry Dollhoff, Reston, 1979, which contains a 10-chapter case study that uses this device. Quote (without comment) from the dust jacket: "Complete analysis of the 9900 microprocessor with stand-alone programs, performance ratings of six competing 16-bit machines, and more!" Mike (used to teach a microprocessor course) Faiman, Urbana