Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!zaphod.mps.ohio-state.edu!uakari.primate.wisc.edu!crdgw1!uunet!mcsun!cernvax!chx400!ethz!ruehl From: ruehl@ethz.UUCP (Roland Ruehl) Newsgroups: comp.arch Subject: Re: "Rumours" from BYTE - November 1990 Summary: AMD 29050 and compiler Message-ID: <6619@ethz.UUCP> Date: 14 Nov 90 15:43:21 GMT References: <1990Nov13.160952.13856@mozart.amd.com> Organization: ETH Zuerich Lines: 20 In article <1990Nov13.160952.13856@mozart.amd.com>, richard@cayman.amd.com (Richard Relph) writes: > In article pcg@cs.aber.ac.uk (Piercarlo Grandi) writes: > >On page 28: "AMD accelerates RISC line with FPU" > >------------------------------------------------ > >The AMD 29050 has an embedded FPU claimed to have a peak speed of 80 > >MFLOPS, with frequencies from 20Mhz to 40Mhz (two flops per cycle?). > Yes, that's right, two flops per cycle. ......... Even more interesting: when can one get a solid 29050 C compiler exploiting all these goodies ? -- Roland Ruehl uucp: uunet!mcsun!ethz!ruehl Tel: (01) 256 5146 (Switzerland) eunet: ruehl@iis.ethz.ch +411 256 5146 (International) Integrated Systems Laboratory ETH-Zentrum 8092 Zurich