Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!apple!usc!zaphod.mps.ohio-state.edu!lavaca.uh.edu!menudo.uh.edu!sugar!ficc!peter From: peter@ficc.ferranti.com (Peter da Silva) Newsgroups: comp.arch Subject: Re: AT&T Crisp (was Re: registerless architecture Keywords: Crisp, AT&T, register Message-ID: Date: 14 Nov 90 18:27:36 GMT References: <1990Nov12.145410.29035@cs.cmu.edu> <43085@mips.mips.COM> <1514@frapper.nsc.com> Reply-To: peter@ficc.ferranti.com (Peter da Silva) Distribution: usa, na Organization: Xenix Support, FICC Lines: 4 Well, there was the TI 990 microprocessor... it used main memory for its "registers", including the PC. Of course it didn't have a cache to speak of, so it ran like molasses, but it was still an interesting idea. -- Peter da Silva. `-_-' +1 713 274 5180. 'U` peter@ferranti.com