Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!psuvax1!husc6!encore!pinocchio.encore.com From: jkenton@pinocchio.encore.com (Jeff Kenton) Newsgroups: comp.arch Subject: Re: AT&T Crisp (was Re: registerless architecture Message-ID: <13261@encore.Encore.COM> Date: 15 Nov 90 13:34:31 GMT References: Sender: news@Encore.COM Distribution: usa, na Lines: 17 From article , by peter@ficc.ferranti.com (Peter da Silva): > Well, there was the TI 990 microprocessor... it used main memory for > its "registers", including the PC. Of course it didn't have a cache to > speak of, so it ran like molasses, but it was still an interesting > idea. The TI 990 was an interesting idea. TI was apparently so impressed by the way the hardware effort went that it put the hardware guy responsible in charge of software as well. Horror stories on request. ----- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - ----- ----- jeff kenton: consulting at jkenton@pinocchio.encore.com ----- ----- until 11/30/90 -- always at (617) 894-4508 ----- ----- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -----