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From: bsw@cci632.UUCP (Brad Werner)
Newsgroups: comp.sys.m68k
Subject: Re: Looking for PD/Free floating point emulation for 68040
Summary: backtracking the PC not necessary
Keywords: 68040 FPU emulation
Message-ID: <42920@cci632.UUCP>
Date: 12 Nov 90 13:31:04 GMT
References: <16871@samsung.samsung.com>
Reply-To: bsw@ccird1.UUCP (Brad Werner)
Distribution: na
Organization: Computer Consoles Inc. an STC Company, Rochester, NY
Lines: 28

In article <16871@samsung.samsung.com> duane@mauve.samsung.com (Andrew Duane) writes:
*[...] the 68040 chip [...]
*	1) The '40 doesn't support all of the floating point
*	   instructions the 68882 coprocessor did. We are looking
*	   for some software to emulate this subset of operations.
*	2) The exception frame for an unimplemented FP opcode is
*	   an F-line (type 2) frame. The saved PC is the instruction
*	   *AFTER* the bad one. Is backtracking to get the failed
*	   instruction hard. If so, we would want to get some code
*	   to do this.
*Only my cat shares my opinions, and she's Intel-based.

In section 9.3.6 of the 040 user's manual, (pg 9-12 in 1989 ed.)
it is noted that the FSAVE frame contains all the required info.
you need to emulate [to completion] the instruction, and it is
noted there that whereas the PC is as you mentioned, pointing
to the next instruction, the actual PC is in the FSAVE frame
as well as the command word (CMDREG1B).  See sec. 9.7 "Floating-Point
State Frames" for the breakdown of the FSAVE frames.  The exception
frame and the FSAVE frame together contain enough information for
an exception handler to attempt completion of the instructions.
Be careful of unimplemented data types.  The manual notes that
the operand fetch has been done, and the destination for these
instructions may only be a register.  There is enough information
there to make it pretty straight-forward.  Good luck.

Disclaimer: I speak for myself && none other && vice versa;
Brad Werner; bsw@cci.com; ...!rochester!cci632!ccird1!bsw