Path: utzoo!utgpu!news-server.csri.toronto.edu!clyde.concordia.ca!uunet!zaphod.mps.ohio-state.edu!mips!daver!bungi.com!news From: phil@unicorn.cc.wwu.edu (Phil Nelson) Newsgroups: comp.sys.nsc.32k Subject: SCN2681 DUARTs Message-ID: <9011120042.AA01970@unicorn.cc.wwu.edu> Date: 12 Nov 90 00:42:34 GMT Sender: news@daver.bungi.com Reply-To: phil@cs.wwu.edu Lines: 25 Approved: news@daver.bungi.com Hi, I was looking over the information on the SCN2681s and how they are configured in the pc532 and I discovered something that I wondered if it was really true. By the documentation I have, it looks like the following control signals are connected to the input and output ports in the following way: RTSA OP0 RTSB OP1 DTRA OP2 DTRB OP3 RxRDYA OP4 RxRDYB OP5 (Notice the alternating Port A on even OP and Port B on odd OP.) And then... CTSA IP0 CTSB IP1 ** DCDB IP2 ** DCDA IP3 Is it really wired that way or are the schematics wrong or are my documents that describe the pinout for the 2681 wrong? Thanks! --Phil