Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sdd.hp.com!mips!daver!bungi.com!news From: george@wombat.bungi.COM (George Scolaro) Newsgroups: comp.sys.nsc.32k Subject: Re: SCN2681 DUARTs Message-ID: <9011121511.AA04945@wombat.bungi.COM> Date: 12 Nov 90 22:11:13 GMT Sender: news@daver.bungi.com Lines: 39 Approved: news@daver.bungi.com [In the message entitled "SCN2681 DUARTs" on Nov 11, 16:42, Phil Nelson writes:] > > Hi, > I was looking over the information on the SCN2681s and how they > are configured in the pc532 and I discovered something that I > wondered if it was really true. By the documentation I have, it > looks like the following control signals are connected to the input > and output ports in the following way: > RTSA OP0 > RTSB OP1 > DTRA OP2 > DTRB OP3 > RxRDYA OP4 > RxRDYB OP5 > > (Notice the alternating Port A on even OP and Port B on odd OP.) > And then... > CTSA IP0 > CTSB IP1 > ** DCDB IP2 > ** DCDA IP3 > > Is it really wired that way or are the schematics wrong or are my > documents that describe the pinout for the 2681 wrong? Yes this is correct. The 2681 allocates IP2 and IP3 as general purpose inputs. I just used them any old how. As Dave mentions to me, this makes it a tad harder on the software - but then he agreed with my allocation in the first place! maybe he wasn't listening to me then... Note that the schematics are 100% representative of the PCB - the netlist was used to route the board and was then back annotated (to the schematics) and checked again. best regards, -- George Scolaro george@wombat.bungi.com [37 20 51 N / 122 03 07 W]