Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!usc!zaphod.mps.ohio-state.edu!mips!hal!mark From: mark@mips.COM (Mark G. Johnson) Newsgroups: sci.electronics Subject: Re: Filter simulation in Pspice Message-ID: <43027@mips.mips.COM> Date: 10 Nov 90 17:19:56 GMT References: <1990Nov9.160343.3301@sunee.waterloo.edu> Sender: news@mips.COM Reply-To: mark@mips.COM (Mark G. Johnson) Distribution: na Organization: MIPS Computer Systems, Inc. Lines: 13 In article <1990Nov9.160343.3301@sunee.waterloo.edu> simpson@sunee.waterloo.edu (KFS Lam) writes: >I get around it by putting a HUGE resistor >from that node to ground. Then Pspice starts to complaint about >convergence problem in DC analysis. Is there any way you can Another standard stunt is to use large (10 Henry) inductors from "floating" nodes to voltage sources. This sets the voltage at time zero and then keeps out of the way during other analyses. -- -- Mark Johnson MIPS Computer Systems, 930 E. Arques M/S 2-02, Sunnyvale, CA 94086 (408) 524-8308 mark@mips.com {or ...!decwrl!mips!mark}