Path: utzoo!attcan!uunet!olivea!apple!well!feustel
From: feustel@well.sf.ca.us (David Alan Feustel)
Newsgroups: comp.arch
Subject: Hardware Support for DPMI in the 586
Keywords: DPMI Intel 80586
Message-ID: <21693@well.sf.ca.us>
Date: 16 Nov 90 23:44:02 GMT
Distribution: comp
Organization: DAFCO - An OS/2 Oasis
Lines: 22


Portions of the proposed DPMI specification could easily be supported by
hardware in the Intel 586 chip.  In particular, the functions "Simulate
Real Mode Interrupt" (Section 11.1 in version 0.9 of DPMI spec) could be
implemented in hardware by defining a 256 bit vector (32 bytes) in the
TSS just before the i/o permission bitmap.  A one bit in the vector would
enable the simulation of the corresponding real mode interrupt, a zero
bit would cause a trap to the kernel.

A task-specific IDT could be defined by
assigning space for a pointer to it in the task's TSS. The IDT bit vector
would then select the global or local IDT depending upon the value of the
bit corresponding to the activated interrupt. The default value of the
task-specific IDT would be 0 so that virtual mode int instructions would
work like real mode int instructions.

With this hardware support, use of the software interrupt instructions
by users would involve a lot less operating system software support.
-- 
Dave Feustel, 1930 Curdes Ave, Fort Wayne, IN 46805-2710 (219)-482-9631  
EMAIL:	feustel@well.sf.ca.us	{ucbvax,apple,hplabs,pacbell}!well!feustel	
BIX: feustel    COMPUSERV: 72730,566    MCIMAIL: dfeustel