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From: bimandre@saturnus.cs.kuleuven.ac.be (Andre Marien)
Newsgroups: comp.arch
Subject: Re: registerless architecture
Keywords: register Prolog
Message-ID: <1373@n_kulcscs.kuleuven.ac.be>
Date: 20 Nov 90 04:49:11 GMT
References: <1990Nov14.113748.3677@diku.dk>
Sender: news@cs.kuleuven.ac.be
Organization: Dept. of Computer Science (K.U.Leuven)
Lines: 49
Originator: bimandre@saturnus

artcle : <1990Nov14.113748.3677@diku.dk> says :

> This will invariably lead to
> saving registers when this is (in a particular run-time situation) not
> necessary. While the problem in most cases is small, it can in some
> cases have a noticeable effect. This is especially true in languages
> like LISP or Prolog, where basic blocks and procedures are small.

> In languages that
> use a lot of heap access (LISP, Prolog,...), a multiported cache is a
> huge benefit, whereas a large set of registers almost no help at all.

> All in all, IMHO a well-designed registerless architecture with a
> multiported cache can perform just as well as a register architecture
> on C-like languages and far better on languages like LISP and Prolog.

While it is true that architectures seem to forget languages like Prolog,
the above quotes are not quite true.
Let me first say that the fact that Prolog is forgotten can be justified by the
small commercial interest compared to other languages. I hope this will change,
of course (see signature)

In Prolog, basic blocks are small, but then Prolog is compiled very differently
from C. There is nothing but recursion in Prolog, which is not translated
to 'procedure calls' by any decend system I know of. Some attempts have been
made to map Prolog stacks to C/Pascal procedure stacks, none really succesful.

Register allocation for Prolog is also different from C/Pascal/... .
There is a more complex abstract machine, with a lot of often used registers,
lets say 8. The calling conventions can use another 4 registers just for
fast argument passing. The kernel algorithm in Prolog is unification, which
adds another 2 registers. So some 16 registers can be used to great benefit.

Anyone who both did a 386 and a SPARC/MIPS port will know the difference
the number of available registers makes.

Prolog does have burst heap/stack accesses :
creating choicepoints : some 10 words
creating environments : some 6 words
creating structured data : some 6 words
but I don't see a reason here for multiported access.

Decend support for tag manipulation would be far more useful.
This was one of the big disappointments on the SPARC.

Andre' Marien
bimandre@cs.kuleuven.ac.be
(ProLog by BIM, ex BIM_Prolog)
If opinions are found, they are not guaranteed to belong to anyone.