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From: hankd@dynamo.ecn.purdue.edu (Hank Dietz)
Newsgroups: comp.arch
Subject: Re: registerless architecture
Summary: No, cache isn't everything.
Keywords: cache
Message-ID: <1990Nov21.004355.212@noose.ecn.purdue.edu>
Date: 21 Nov 90 00:43:55 GMT
References: <1990Nov12.145410.29035@cs.cmu.edu> <56084@brunix.UUCP> <1990Nov14.064225.14406@caliban.uucp>
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As to all the comments about needing only cache, I've said it before
and I'll say it again....  Registers help because:

[1]	They are fast
[2]	Register refs don't interfere with memory data path
[3]	You never miss (i.e., have static timing for schedules)
[3]	Register names are shorter than addresses

A conventional cache gets you only benefit [1]; however, ambiguously
aliased references (array elements and pointer targets) are
effectively managed by a cache whereas they require frequent flushing
from registers.  If you want all the benefits, you need both....

Well, almost.  Actually, all you need is a mutant thing like CRegs.
See the paper:  H.  Dietz and C-H Chi, "CRegs: A New Kind of Memory
for Referencing Arrays and POinters," from Supercomputing '88.  If you
don't like that, look at the paper in Supercomputing '90 by B. Heggy
and M. Soffa -- it describes a somewhat more complex register value
forwarding mechanism which works like fully-associative CRegs.

						-hankd