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From: ckp@grebyn.com (Checkpoint Technologies)
Newsgroups: comp.arch
Subject: Re: VAX and VMS development (was Re: Graphics Primitives)
Message-ID: <23425@grebyn.com>
Date: 21 Nov 90 23:36:26 GMT
References: <11030@pt.cs.cmu.edu> <42992@mips.mips.COM> <513@ctycal.UUCP> <1990Nov21.191759.23254@Think.COM>
Reply-To: ckp@grebyn.UUCP (Checkpoint Technologies)
Organization: Grebyn Timesharing, Vienna, VA, USA
Lines: 20

In article <1990Nov21.191759.23254@Think.COM> barmar@think.com (Barry Margolin) writes:
>Also, to contradict your premise, I have a vague recollection that the VAX
>memory architecture is lacking a dirty bit in the page table (but I could
>be confusing it with another contemporary), even though most paging
>algorithms would be helped by this feature.  Perhaps the VAX and VMS seem
>like such a good match because VMS doesn't try to do things that are hard
>to do on the VAX.

The VAX MMU has a "modified" bit for page table entries, but no
"referenced" bit.  VMS uses a "soft page fault" (the page is invalidated
for the user, but remains in core; if a fault occurs, the page is
revalidated quickly) to discover reference frequency.  Interestingly
enough, the "modified" bit is not used by VMS; pages are always
written out, modified or not. (I, also, have taken the
VMS internals course!)
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