Path: utzoo!utgpu!cunews!bnrgate!brtph3!brchh104!brchs1!bnr.ca!rice!sun-spots-request
From: yhan@caip.rutgers.edu (Young Han)
Newsgroups: comp.sys.sun
Subject: Want info. on Raster-Op processor.
Keywords: Hardware
Message-ID: <332@brchh104.bnr.ca>
Date: 19 Nov 90 01:00:00 GMT
Sender: news@brchh104.bnr.ca
Organization: Sun-Spots
Lines: 14
Approved: Sun-Spots@rice.edu
X-Original-Date: 3 Nov 90 03:57:38 GMT
X-Sun-Spots-Digest: Volume 9, Issue 370, message 5
X-Note: Submissions: sun-spots@rice.edu, Admin: sun-spots-request@rice.edu

If anyone could send me any infomation, such as logical level diagram, on
Raster-Op processor, I will REALLY appreciate it. I am trying to draw a
layout of the chip for my Intro. to VLSI design class project.  I've
looked into "Sun-3 Architecture:SUN Technical Report(Revised Aug.  86)"
and it had only a paragraph of infomation about it. I know I should be
searching around but as an undergraduate senior, I just don't have time
for it.

Your help  will be greately appreciated.

Young S. Han                          Pmail : 10 Landing Lane APT 1K
Prime Computer                                New Brunswick, NJ 08901
College of Engineering                Vmail : (908) 932-3418
Office: ENG-B124                      Email : yhan@caip.rutgers.edu