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From: ftpam1@acad3.fai.alaska.edu (MUNTS PHILLIP A)
Newsgroups: sci.electronics
Subject: Re: RAM access times
Message-ID: <1990Nov19.054401.21282@hayes.ims.alaska.edu>
Date: 19 Nov 90 05:44:01 GMT
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In article <2416@krafla.rhi.hi.is>, adamd@rhi.hi.is (Adam David) writes...
>I am interested in how RAM access times are specified. Say a 150ns RAM chip is
>read and immediately written again without changing the address or deselecting
>the chip between. What is the total time taken? The read cycle must take 150ns,
>but when the write cycle begins the correct memory cell is already addressed.
>How long does it take to actually write to (or read from) a memory cell without
>considering addressing delays?
> 
>Does anyone have experience or other inside knowledge about this issue?
>Would there be any difference between the times for SRAM or DRAM?
> 
>Thanks ahead for any help,
> 
>Adam David.         adamd@rhi.hi.is

     Read access times for static RAM is generally specified from chip select
going active OR address lines going stable, whichever happens last.  The
minimum read cycle time is the same as the access time, but can only occur if
chip select is continuously active and the address lines change instantaneously
exactly every access time.  This is of course impossible in the real world.
(With fast, registered address buffers you could get pretty doggone close.)
If you never change the address and hold chip select active, you can perform
infinitely fast read cycles, of course. :-)

     Write cycles are a bit more complex and vary somewhat among manufacturers.
Some allow shorter write cycles but the NEC Memory Products Data Book I happen
to have at hand specifies write cycles at the same duration as read cycles.  If
you add up all the individual pieces of the cycle, however, the minimum total
is quite a bit less than the total cycle time specified.  So you might be able
to get away with faster write cycles but this would be bad engineering practice
for anything intended to be marketed.

     Cycle times for dynamic RAM are almost always longer than the access times
because of the address multiplexing overhead and something called the precharge
time.  DRAM is beyond the scope of my experience and I can't say much more.

Philip Munts
NRA Extremist, etc.
University of Alaska, Fairbanks