Path: utzoo!utgpu!news-server.csri.toronto.edu!eecg.toronto.edu!chik Newsgroups: sci.electronics From: chik@eecg.toronto.edu (Raymond Chik) Subject: Re: Design Tools for Electrical Engineering Message-ID: <1990Nov22.115138.5109@jarvis.csri.toronto.edu> Keywords: SPICE Organization: EECG, University of Toronto References: <1990Nov22.002945.24105@agate.berkeley.edu> Date: 22 Nov 90 16:51:38 GMT Lines: 48 In article <1990Nov22.002945.24105@agate.berkeley.edu> positron@cosmic.berkeley.edu (Shigeki Misawa) writes: > > Hi, I am interested in finding out what design tools are >available for designing electronic circuits, circuit boards, IC, and >other design tools like schematic capture, or for signal processing >and other related fields. I would like to know what you use, how you >like it, and where you can get it. ......... We use "Cadence" (or Edge.... Opus... etc) as the standard IC design package in our group. I like its concept of combining the whole design cycle into one CAD package [schematic.... (Logic/Analog) simulation..... layout..... (Logic/Analog)simulation...]. However, it needs very much effort to set up the whole environment to make it user friendly enough. Too many bits and pieces you need to worry about...... sometimes it takes hours to discover that you cannot put a label somewhere on your schematic which is not detected by the design rule checker but results in fatal error! In terms of IC mask layout, I prefer "MAGIC". I've used it in a course project and found it very enjoyable. But it seems that people all around here (Ontario, Canada) are using "Cadence". BTW, the simulation softwares that are interfaced into our Cadence include HSPICE, SILOS (and others that are not oftenly used). I personally like the convenience of having all the things done in one package. The only think I have complain on is the IC mask layout part..... I simply don't like it very much. :-( Anyone out there has unpleasent experience with Cadence? Raymond Chik. ************************************************************************** * May the force be with you!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!* * Raymond Y. V. Chik |_ \ _| * * VLSI Research Grp. || -------- || * * Dept. of Elec. Eng. _||o-+ | -+-+- +-o||_ * * U. of Toronto | | | +-+ | | * * |_ | | _|_ | _| * *Internet: chik@eecg.toronto.edu ||--+ | | | | +--|| * * chik@vrg.toronto.edu _|| / | | | ||_ * * 8-) >-( |-< %-> | | | * **************************************************************************