Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!samsung!munnari.oz.au!uniwa!DIALix!bernie
From: bernie@DIALix.oz.au (Bernd Felsche)
Newsgroups: comp.sys.amiga
Subject: A3000 CPU cache (was: Query - 68040 slot in A3000)
Message-ID: <611@DIALix.oz.au>
Date: 25 Nov 90 02:26:32 GMT
References: <6210@harrier.ukc.ac.uk>
Organization: DIALix Services, Perth Western Australia
Lines: 20

Instead of an `040, how about somebody building a cache-board?

This would have to be write-through architecture, due to the
co-processors.  64K I + 64K D would be nice :-), and bus-snooping
circuitry essential because of the effective multi-processing.

I believe (though I may be proved wrong), that this would not affect
the software compatibility in any way, other than speed.  Bus 
contention would be reduced, but more importantly, the `030 could 
be working without memory wait-cycles most of the time.

As an upgrade cost, I expect that this would be less than an `040,
and it could be made available NOW! (providing it can be designed
over a cup of coffee)

Any takers?  
-- 
 ________Bernd_Felsche__________bernie@DIALix.oz.au_____________
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