Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!hsdndev!cmcl2!pluto!alex
From: alex@pluto.dss.com (Alex Smith)
Newsgroups: comp.sys.next
Subject: Re: NextStation impressions
Summary: 68030/040 bit shift instructions
Message-ID: <4088@pluto.dss.com>
Date: 30 Nov 90 02:34:16 GMT
References: <9325@pasteur.Berkeley.EDU>
Organization: Datability Software Systems, New York, NY
Lines: 30

In article <9325@pasteur.Berkeley.EDU>, carlton@aldebaran.berkeley.edu (Mike Carlton) writes:
> Greetings,

[ Benchmark specifics ]

> For the one-liners, the NextStation ranges from 1.1 to 1.5 times the
> speed of a Sparcstation 1+.  On the larger simulation the Next is only
> 75% of the speed of the Sparcstation, we believe this could be due
> to caching on the Sparc or due to slow bit operations, since the simulation 
> performs quite a few, and the 040 should be slower on large shifts (the shift 
> instruction can only specify shifts of 1-8 bits on the 030 and presumably 
              ^^^ ^^^^ ^^^^^^^ ^^^^^^ ^^ ^^^ ^^^^
According to the MC68030 User's Manual (2nd Ed.):

	The shift count for the shifting of a [data] register is specified
	in two different ways:

	1. Immediate -- The shift count (1-8) is specified in the instruction.
	2. Register -- The shift count is the value in the data register
	   specified in the instruction modulo 64.
                                        ^^^^^^ ^^
Perhaps the simulation is using immediate specification, or shifting memory
(which can only be done one bit/byte at a time).

> the same is true of the 040).

[ etc.]

Alexander Smith		"If that was an opinion, this is a disclaimer."
alex@pluto.dss.com