Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!sun-barr!apple!agate!pasteur!aldebaran!carlton
From: carlton@aldebaran (Mike Carlton)
Newsgroups: comp.sys.next
Subject: Re: NextStation impressions
Message-ID: <9358@pasteur.Berkeley.EDU>
Date: 30 Nov 90 21:00:00 GMT
References: <9325@pasteur.Berkeley.EDU> <4088@pluto.dss.com>
Sender: news@pasteur.Berkeley.EDU
Reply-To: carlton@aldebaran.berkeley.edu (Mike Carlton)
Organization: University of California at Berkeley
Lines: 48

In article <4088@pluto.dss.com> alex@pluto.dss.com (Alex Smith) writes:
+In article <9325@pasteur.Berkeley.EDU>, carlton@aldebaran.berkeley.edu (Mike Carlton) writes:
+> Greetings,
+
+[ Benchmark specifics ]
+
+> instruction can only specify shifts of 1-8 bits on the 030 and presumably 
+              ^^^ ^^^^ ^^^^^^^ ^^^^^^ ^^ ^^^ ^^^^
+According to the MC68030 User's Manual (2nd Ed.):
+
+	The shift count for the shifting of a [data] register is specified
+	in two different ways:
+
+	1. Immediate -- The shift count (1-8) is specified in the instruction.
+	2. Register -- The shift count is the value in the data register
+	   specified in the instruction modulo 64.
+                                        ^^^^^^ ^^
+Perhaps the simulation is using immediate specification, or shifting memory
+(which can only be done one bit/byte at a time).
+
+> the same is true of the 040).
+
+[ etc.]
+
+Alexander Smith		"If that was an opinion, this is a disclaimer."
+alex@pluto.dss.com

I wasn't real clear on my original posting, mainly because I was still
speculating about the possible problems due to an 040.  Yes, the code
uses immediate shifts extensively.  At some point, it becomes faster for
the compiler to load a temp register with a shift amount and do a register
shift rather than multiple immediate shifts.  I don't know what gcc does,
I have not profiled the code or looked at the assembly generated because
it hasn't been a priority.

Here are a few lines from one of the header files, showing some of the 
operations that are being performed:
	#define sign_ext_11(data)  (((int)((data)<<21))>>21)
	#define sign_ext_12(data)  (((int)((data)<<20))>>20)
and even:
	#define tagged_imm_11(tage,data) \
        	((-ebit(tage))^((((-ebit(tage))^(tage))<<27)| \
        	(((-ebit(tage))^(data))&0x7ff)))

When I get a slab, I'll take a look at what the compiler is generating.

--mike
Mike Carlton	carlton@cs.berkeley.edu