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From: ejmag@aplcen.apl.jhu.edu (Eric J. Magnusson)
Newsgroups: comp.lsi.cad
Subject: Re: Available Design Tools -- PLD
Message-ID: <1990Dec5.174745.1165@aplcen.apl.jhu.edu>
Date: 5 Dec 90 17:47:45 GMT
References: <1990Nov22.003658.24632@agate.berkeley.edu> <4273@acorn.co.uk>
Reply-To: ejmag@aplcen.apl.jhu.edu (Eric J. Magnusson)
Distribution: comp
Organization: Johns Hopkins University
Lines: 18

In article <4273@acorn.co.uk> astevens@acorn.co.uk (Ashley Stevens) writes:
>I'm especially interested in PLA compilers, but also in other
>tools too.

Texas Instruments has a MS-DOS PLD compiler which allows you to 
describe your logic design in the following formats:
Truth Table
Boolean Equations
State Diagrams

It will then compile the description to a standard JEDEC fuse map which
can be used to program the PLD directly.

I received it free from Texas Instruments as part of an ad campaign.
You may be able to get it the same way.

Eric Magnusson
ejmag@aplcen.apl.jhu.edu