Path: utzoo!utgpu!news-server.csri.toronto.edu!cs.utexas.edu!usc!apple!mdtaylor
From: mdtaylor@Apple.COM (Mark Taylor)
Newsgroups: comp.sys.mac.programmer
Subject: MPW Make file weirdness
Message-ID: <11406@goofy.Apple.COM>
Date: 3 Dec 90 07:36:44 GMT
Distribution: na
Organization: Apple Computer Inc., Cupertino, CA
Lines: 28

The source code for my C program is divided into several files (let's say
file1.c, file2.c, etc.,) each with its own header file (file1.h, file2.h,
etc.)  Each .c file #includes the .h files it needs, and my makefile reflects
these dependencies so that if I modify, say, file2.h, only those .c files
that #include file2.h are re-compiled.

So far, so good.

But then it occurs to me that, say, file2.h itself #includes a basic header
file, called, say, basic.h.  I would like my makefile to reflect this
dependency.  So I create one dependency rule in my makefile that says, simply:

file2.h <option-f> basic.h

This doesn't work as I expect.  After the first make using this new makefile,
then no matter what I do (or don't do), all the .c files that include file2.h
are always recompiled.  Even if I start a second make immediately after the
first, without changing anything, all my .c files that include file2.h are
recompiled!

The only fix is to put basic.h in the dependency rule of each .c file that
already contains file2.h.

Why doesn't the way I tried work, and/or what is the proper way to do this?

Thanks in advance,

- Mark