Path: utzoo!utgpu!news-server.csri.toronto.edu!rutgers!usc!julius.cs.uiuc.edu!news.cs.indiana.edu!ux1.cso.uiuc.edu!ux1.cso.uiuc.edu!aglew From: aglew@crhc.uiuc.edu (Andy Glew) Newsgroups: comp.arch Subject: Re: The Future of Buses (and Futurebus) Message-ID: Date: 10 Dec 90 02:48:18 GMT References: <36734@cup.portal.com> Sender: news@ux1.cso.uiuc.edu (News) Organization: Center for Reliable and High-Performance Computing University of Illinois at Urbana Champaign Lines: 20 In-Reply-To: mmm@cup.portal.com's message of 9 Dec 90 22:34:12 GMT Well, I'm going to be deliberately antagonistic here. I'm not as opposed to FEATUREbus+ as I appear to be here. In fact, I voted for acceptance of the standard - because the standard has been far too blooming long in coming. What are the likely successors to VME, and why? How is the role of the bus in computer architecture likely to change? How significant will Futurebus+ become? The likely successor to VME is VME-64. It's simple, fast, and available now. The likely successor to VME-64, if there is a lineal successor, will probably involve noticing that there are extra pins on most VME boards second connector... FUTUREbus+'s impact will be as an I/O bus -- the profile that DEC is pushing. The processor to memory connection is too important to be left a standard bus, especially a standard bus that is as featureful as FUTUREbus. -- Andy Glew, a-glew@uiuc.edu [get ph nameserver from uxc.cso.uiuc.edu:net/qi]