Path: utzoo!censor!geac!torsqnt!news-server.csri.toronto.edu!cs.utexas.edu!swrinde!elroy.jpl.nasa.gov!ncar!boulder!uswat!csn!tigger!atk From: atk@tigger.Colorado.EDU (Alan T. Krantz) Newsgroups: comp.sys.laptops Subject: Re: Dataworld LP-320 analysis Message-ID: <1990Dec7.162834.24566@csn.org> Date: 7 Dec 90 16:28:34 GMT References: <1990Dec4.223137.23174@aeras.uucp> <1990Dec6.164923.5100@ux1.cso.uiuc.edu> Sender: news@csn.org Organization: University of Colorado, Boulder Lines: 31 Nntp-Posting-Host: tigger.colorado.edu In article <1990Dec6.164923.5100@ux1.cso.uiuc.edu> gcw20877@uxa.cso.uiuc.edu (George Wang) writes: >In article <1990Dec4.223137.23174@aeras.uucp> andrew@aeras.uucp (Andrew Ward) writes: >>In response to the inquiries on the Dataworld LP-320 laptop, I have >>the following comments: >> >>The anomalies are why a 16 Mhz 386 has a higher compute index >>than a 20 Mhz 386, and why there was an increase in performance >>in one of the CI results on the LP-320. >I too have noticed this!! I suspect that the internal bus may >be limited somehow in the laptop.. I think the motherboard may >have been designed non-optimally.. I've got a 5.25" 1.2 meg drive What is probably more likely is that this 20 Mhz system has 1 or 2 wait-states and the 16 Mhz has 0 or 1 wait states. This info should be in the documentation of both computers. If not you can probably figure it out by the speed of the memory (just look at the chips)... I think a 20mhz would have to have 1 wait state without a cache (using common 1mb chips) and the 16mhz could just squeeze by with 0 wait states using common 1mb chips (doubled banked) - but I forget these things... Anyways.... ------------------------------------------------------------------ | Mail: 1830 22nd street Email: atk@boulder.colorado.edu| | Apt 16 Vmail: Home: (303) 939-8256 | | Boulder, Co 80302 Office: (303) 492-8115 | ------------------------------------------------------------------