Path: utzoo!censor!geac!torsqnt!news-server.csri.toronto.edu!cs.utexas.edu!wuarchive!zaphod.mps.ohio-state.edu!rpi!bu.edu!hsdndev!husc6!contact!ileaf!io!dbjag From: dbjag@io.UUCP (David Benjamin) Newsgroups: comp.sys.m88k Subject: m88200 cache flushes on DG Aviion Keywords: m88200 Aviion Message-ID: <2308@io.UUCP> Date: 6 Dec 90 16:41:04 GMT Organization: Interleaf Inc, Cambridge, MA Lines: 21 Does anyone know of a good method for forcing a memory cache flush on a Data General Aviion 300 series workstation. Specifically, I would like to request a specific line flush from the m88200 cache handling instructions. I'm not too keen on a full flush of both caches, as that would take too much time. The reason is kind of hairy, but if you must know, it involves self-modifying code which seems to fail on the Aviion when the caches get out of sync. There, glad you asked? This brings up another question. The code is apparently failing because the contents of the two caches different values for the same address. Why wasn't this state prevented by the "M-bus snooping" of the 88200's? Perhaps my understanding of their function is warped. Thanks in advance. -- - Dave Benjamin - - Interleaf - - ...!eddie.mit.EDU!ileaf!dbjag -